FPGA RISC CPU, DDR CONTROLER , USB2.0

在网上下载到一些FPGA的源码,共享!


FPGA_RSIC_CPU设计文档和源码.rar


Verilog实现的以太网接口.rar


DDR_SDRAM控制器verilog代码及中文说明文档.rar


Xilinx_sparten3E_键盘和开发板的通信和LCD的字符显示.rar


Xilinx_FPGA_最小系统原理图_XC3S400_+_USB2.0.rar



Technorati : , ,

该日志未加标签。
FPGA BOARD , Altera and Xilinx, News

相关日志

If you enjoyed this post, please consider to leave a comment or subscribe to the feed and get future articles delivered to your feed reader.

Leave Comment

(必填)

(必填)