astro eco with spare gate

数字eco的方案定下来了,但是手工改动已经不能实现了,因为metal连线太密了。郁闷中。现在只能试试通过astro进行eco了。下面是搜集的eco资料,希望对大家有用。

Performing a Simple ECO in the Astro Flow on a Flat Netlist

Question:

I have a simple flat design fully routed in Astro. I need to add
two cells and change four Net connections. What is the best way to perform
an ECO in Astro?

Answer:

To perform a simple ECO on a flat netlist, by adding or deleting a few cells or nets, do
the following steps:

Note:
This flow assumes that the design was run flat without hierarchical preservation. This
flow requires that the new Verilog file be provided to Astro to implement the changes
and route the new nets.

1. Create a new Verilog file that has the new cells added or deleted, this becomes the
updated design. For example, this design can be named, new_design.v.

2. Load the Verilog file into Astro, select Netlist In, Expand, Bind, and so forth, into
a new ECO library. For example, naming this design, new_design.

3. Copy the original routed cells from the original library to a new ECO library
using the geCopyCell command. For example, naming this design, for_eco.

4. Open the new library and then open the cells. Purge all the standard filler cells if
you need to make changes to the standard cell placement; otherwise, purge the
filler cells of the macro type that is being modified. If existing spare cells are
used, no filler cell purging is necessary.

5. Save the for_eco Milkyway database.

6. Select Tools > DataPrep > ECO > By Net Compare.

7. Select the ECO Library and the design cell, which is the original routed design
with the filler cells removed, for_eco. The ECO design is the new modified
design, new_design. Click OK.

8. Select the ECO menu and choose the Write to File Option. Dump all of the ECO
information to a file. Make sure this file contains the exact information that you
are trying to modify.

9. Select Tools > Astro > Cell > Open for_eco

10. Select Tools > Astro > ECO > Eco Place > Design ECO
This step places the new cells added to your design as required by the ECO. After
the auECOByNetCmp command, any cell instances added in the new version of
the netlist appear unplaced to the right of the top cell. If you are connecting to
spare cells, they will already be placed and no ECO place will be necessary.

11. Add all the filler cells to fill up the empty sites as you do in a normal flow before
routing a design.

12. Select Tools > Astro > ECO > ECO Route > Design ECO. Use the default
settings; using the default settings will reroute the design in ECO mode, that is, it
only routes the affected nets and might only modify preexisting nets as needed to
clean any DRC violations. If you get 0 Violations you are done.

If you have violations, use normal techniques to clean up the DRC violations.

Note:
If you want to use ECO to insert buffers to split a net, this can be done by using the
astLenBI command, this method is length based and will require the ECO route
command, axRouteAddBufferByFile, this method will do an ECO place and route
automatically.

from:://http://www.smth.edu.cn/pc/pccon.php?id=5020&nid=131070

以下是 siliconfree_eco的标准流程

define ECO_LIB_NAME “CHIP_ECO”
define TF_FILE “../umc_018_1p6m_mk_tlu.tf”
define TLUPLUS_FILE “../umc18_1p6m.itf.tlu”
define TLUPLUS_MAP “../1p6m.map”
define PRE_ECO_LIB_NAME “CHIP”
define PRE_ECO_CELL_NAME “chip”
define ECO_NETLIST “eco.v”
define ECO_CELL_NAME “chip_eco”
define POWER “VCC”
define GROUND “GND”

;; Create Library
cmCreateLib
formDefault “Create Library”
setFormField “Create Library” “Library Name” ECO_LIB_NAME
setFormField “Create Library” “Technology File Name” TF_FILE
setFormField “Create Library” “Set Case Sensitive” “1″
formOK “Create Library”

;; Add Reference Library
cmRefLib
formDefault “Ref Library”
setFormField “Ref Library” “Library Name” ECO_LIB_NAME
setFormField “Ref Library” “Ref Library Name” “../std”
formApply “Ref Library”
setFormField “Ref Library” “Ref Library Name” “../macro”
formApply “Ref Library”
setFormField “Ref Library” “Ref Library Name” “../io”
formOK “Ref Library”

;; Set TLU+
cmItfToTLUPlus
formDefault “Convert ITF to TLU”
setFormField “Convert ITF to TLU” “Library Name” ECO_LIB_NAME
formButton “Convert ITF to TLU” “cleanMWTLUPlus”
setFormField “Convert ITF to TLU” “MIN” “1″
setFormField “Convert ITF to TLU” “NOM” “1″
setFormField “Convert ITF to TLU” “MAX” “1″
setFormField “Convert ITF to TLU” “Min CapTable File” TLUPLUS_FILE
setFormField “Convert ITF to TLU” “Nom CapTable File” TLUPLUS_FILE
setFormField “Convert ITF to TLU” “Max CapTable File” TLUPLUS_FILE
setFormField “Convert ITF to TLU” “Star-RCXT Mapping File” TLUPLUS_MAP
setFormField “Convert ITF to TLU” “CapTable Type” “Normal”
formOK “Convert ITF to TLU”

;; Open Library
geOpenLib
formDefault “Open Library”
setFormField “Open Library” “Library Name” ECO_LIB_NAME
formOK “Open Library”

;; Copy Cell
geCopyCell
formDefault “Copy Cell”
setFormField “Copy Cell” “From Library Name” PRE_ECO_LIB_NAME
setFormField “Copy Cell” “From Cell Name” PRE_ECO_CELL_NAME
setFormField “Copy Cell” “To Cell Name” PRE_ECO_CELL_NAME
formOK “Copy Cell”

;; Verilog to Cell
auVerilogToCell
formDefault “Verilog To Cell”
setFormField “Verilog To Cell” “Library Name” ECO_LIB_NAME
setFormField “Verilog To Cell” “Verilog File Name” ECO_NETLIST
setFormField “Verilog To Cell” “Output Cell Name” ECO_CELL_NAME
setFormField “Verilog To Cell” “Net Name for 1′b1″ POWER
setFormField “Verilog To Cell” “Net Name for 1′b0″ GROUND
setFormField “Verilog To Cell” “Set Case Sensitive” “1″
formButton “Verilog To Cell” “globalNetOptions”
setFormField “Verilog To Cell” “Net Name” POWER
setFormField “Verilog To Cell” “Port Pattern” POWER
formButton “Verilog To Cell” “apply”
setFormField “Verilog To Cell” “Net Name” GROUND
setFormField “Verilog To Cell” “Port Pattern” GROUND
formButton “Verilog To Cell” “apply”
subFormHide “Verilog To Cell” 1
formOK “Verilog To Cell”

auECOByNetCmp
formDefault “ECO By Netlist Compare”
setFormField “ECO By Netlist Compare” “Library Name” ECO_LIB_NAME
setFormField “ECO By Netlist Compare” “Design Cell Name” PRE_ECO_CELL_NAME
setFormField “ECO By Netlist Compare” “From Verilog File” “From Milkyway Cell”
setFormField “ECO By Netlist Compare” “ECO Net Cell Name” ECO_CELL_NAME
setFormField “ECO By Netlist Compare” “Freeze Standard Filler Cells” “1″
formOK “ECO By Netlist Compare”

;; Repaire Hier Preservation
astRepairHierPreservation
formDefault “Repair Hierarchy Information”
setFormField “Repair Hierarchy Information” “Flattened Cell Name(.CEL)” PRE_ECO_CELL_NAME
setFormField “Repair Hierarchy Information” “Remove feedthrus to avoid assign stmts in hvo” “1″
formOK “Repair Hierarchy Information”

;; Open Cell
geOpenCell
formDefault “Open Cell”
setFormField “Open Cell” “Cell Name” PRE_ECO_CELL_NAME
formOK “Open Cell”

;; Dump ECO
cmCmdECODump
formDefault “Dump ECO”
setFormField “Dump ECO” “ECO Number” (dbLastECONum (geGetEditCell))
setFormField “Dump ECO” “File Name” (string-append (string-append “eco” (number->string (dbLastECONum (geGetEditCell)))) “.dp”)
formOK “Dump ECO”

;; Connect P/G
setDisplayMode “QueryBoxes” #f
aprPGConnect
formDefault “Connect/Disconnect PG”
setFormField “Connect/Disconnect PG” “Net Type” “Power”
setFormField “Connect/Disconnect PG” “Net Name” “VCC”
setFormField “Connect/Disconnect PG” “Port Pattern” “VCC”
formApply “Connect/Disconnect PG”
setFormField “Connect/Disconnect PG” “Net Name” “VDD”
setFormField “Connect/Disconnect PG” “Port Pattern” “VDD”
formApply “Connect/Disconnect PG”
setFormField “Connect/Disconnect PG” “Net Type” “Ground”
setFormField “Connect/Disconnect PG” “Net Name” “GND”
setFormField “Connect/Disconnect PG” “Port Pattern” “GND”
formApply “Connect/Disconnect PG”
setFormField “Connect/Disconnect PG” “Net Name” “VSS”
setFormField “Connect/Disconnect PG” “Port Pattern” “VSS”
setFormField “Connect/Disconnect PG” “Update Tie Up/Down” “1″
formOK “Connect/Disconnect PG”
setDisplayMode “QueryBoxes” #t

;; Set ECO Status
axgECOStatus
formDefault “ECO Status”
setFormField “ECO Status” “Freeze Silicon” “1″
formOK “ECO Status”

;; ECO Place
axgECOAutoPlaceFS

;; Save Cell
(dbSaveCell (geGetEditCell))

;; ECO Route
axgECORouteDesign
formDefault “ECO Route Design”
setFormField “ECO Route Design” “Reroute” “modified nets first, others later”
setFormField “ECO Route Design” “Search & Repair Loop” “10″
formOK “ECO Route Design”

;; Search and repair
axgSearchRepair
setFormField “Search & Repair” “Search & Repair Loop” “10″
formOK “Search & Repair”

;; Save Cell
(dbSaveCell (geGetEditCell)

http://bbs.vibesic.com/viewthread.php?tid=137629

我想后面这个更好一些,目前测试看来,eco的效果不错。看来以后的流程又可以改动一下了。呵呵呵

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